Senior Design Engineer(FPGA RTL)
Hyderabad, PuneFull-time5–9 yrsPosted 1 week ago
Senior electrical and electronics role at Lattice Semiconductor in Hyderabad and Pune. Needs 5+ years and a B.Sc, M.Sc or PhD.
About the role
We are seeking a Senior IP Design engineer with significant hands-on experience in FPGA RTL design, logic simulation, FPGA compilation and timing closure and hardware debug.
What you need
- FPGA
- Verilog
- C++
- C
- Python
- System design
Good to have
- Perl