Senior Circuit Silicon Correlation DFT Engineer
BengaluruFull-time8–14 yrsPosted over a month ago
Leadership electrical and electronics role at Nvidia in Bengaluru. Needs 8+ years.
About the role
Responsible for generating ATPG patterns for Silicon speed path debug. RTL and gate level verification for ATPG, non-ATPG patterns. Correlating diagnosis result to map to real design failures. Root cause the same feed learnings to pre-silicon design sign off parameters. RAM correlation by studying RAM circuit failure mechanisms and understanding their limits on silicon
What you'll do
- Participate in ground breaking Processor design and debug in deep submicron technologies
- Work in a multi functional team passionate about Silicon characterization and correlation to pre-Silicon Performance and Power models
- Responsible for generating ATPG patterns for Silicon speed path debug
- Develop new methodologies using DFT infrastructure to analyze components of mis-correlation in logic and in/around RAM
What you need
- VLSI
- Deep learning
- MIS reporting
Good to have
- Python
- Perl