Senior Engineer- Clock Planning- PD-Full Chip/Sub system
Bengaluru, HyderabadFull-time5–7 yrsPosted 4 weeks ago
Senior electrical and electronics role at Quest Global in Bengaluru and Hyderabad. Needs 5–7 years and a B.Tech, B.E. or M.Tech.
About the role
Drive full-chip clock architecture and planning, ensuring scalable distribution, timing robustness, implementation feasibility, and cross-hierarchy convergence.
What you'll do
- Define clock planning strategy and distribution architecture
- Own clock source, hierarchy, partition, and interface planning
- Drive skew, latency, transition, and clock QoR targets
- Coordinate with PnR, STA, RTL, DFT, and integration teams
- Lead technical reviews, risk management, and clock closure
Good to have
- Python