Senior CPU Formal Verification Engineer
HyderabadFull-time5–9 yrsPosted 1 week ago
Senior electrical and electronics role at SiFive in Hyderabad. Needs 5+ years and an M.Tech, B.Tech or B.E..
About the role
We are seeking a Senior Design Formal Verification Engineer to own formal strategies for advanced out‑of‑order (OoO) CPU cores . You will work closely with micro‑architects and RTL designers to verify complex execution pipelines.
What you'll do
- Identify blocks suitable for applying Formal Verification
- Create Formal Test-plan for blocks identifying properties to be implemented and sign-off metrics
- Implementation and maintenance of Formal Verification environments in Chisel
- Applying various FV techniques to reduce complexity and prove correctness of DUT
- Debugging RTL to identify causes of failure scenarios
What you need
- Verilog
- Maintenance
- Test cases