Zebu flow Engineer
BengaluruFull-time1–4 yrsPosted 1 week ago
Junior engineering role at SiFive in Bengaluru. Needs 1+ years and a B.Tech, B.E. or B.Sc.
About the role
The successful candidate will join SiFive's System Validation team, which is responsible for the building flow for modelling SiFive's RISC-V CPUs on Emulators like Synopsys Zebu. This role extends beyond Emulators and will work with other FPGA based platforms and flows. .
What you'll do
- Execute root cause and failure analysis across RISC-V CPU hardware and software components
- Facilitate debug using ZeBu features like waveform dumping and utilize ILA and JTAG debuggers to troubleshoot and validate designs
- Develop failure hypotheses through systematic, step-by-step elimination of potential causes
- Work cross-functionally and maintain active partnership with both the software and validation engineering departments
What you need
- Python
- FPGA
- Verilog
- Linux
- Bash