Layout Design, Staff Engineer- 19598
HyderabadFull-time5–9 yrsPosted 1 week ago
Senior electrical and electronics role at Synopsys (incl. Ansys) in Hyderabad. Needs 5+ years and a B.Tech, B.E. or M.Tech.
About the role
Layout Design, Staff Engineer- 19598 at Synopsys (incl. Ansys). Lead layout development for next-generation DDR and HBM PHY IP across 7nm, 5nm, and below in FinFET and GAA process technologies.
What you'll do
- Lead layout development for next-generation DDR and HBM PHY IP across 7nm, 5nm, and below in FinFET and GAA process technologies
- Own floorplanning, layout execution, and design reviews for critical analog and mixed-signal blocks within memory PHY subsystems
- Drive layout quality through PERC, EMIR, DFM checks, LEF generation, and release readiness, ensuring designs meet foundry and customer specifications
- Collaborate with circuit design, verification, and product engineering teams to resolve layout-related issues, optimize for area and performance
- Mentor junior layout engineers on matching techniques, ESD and latch-up strategies, IO frame requirements, and deep submicron layout best practices
What you need
- Circuit design
- VLSI