Technical Lead I - VLSI ML ST
Bengaluru, NoidaFull-time5–7 yrsPosted 1 week ago
Senior software engineering role at UST in Bengaluru and Noida. Needs 5–7 years.
About the role
Memory Layout JD Key Skills & Responsibilities SRAM bitcell and array layout, including abutment and optimization for area and performance Layout of memory peripherals such as Row/Column Decoders, Sense Amplifiers, Pre-charge, Write Drivers, Read/Write Assist, IO and Self-Timing circuits Experience with Single-Port SRAM, Dual-Port SRAM and ROM architectures Full memory macro floorplanning, block integration and critical signal routing Strong understanding of matching, symmetry, shielding and…
What you need
- VLSI
- Machine learning