Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification)
BengaluruFull-time4–7 yrsPosted 1 week ago
Mid-level engineering role at SiFive in Bengaluru. Needs 4+ years and a B.Tech or B.E..
About the role
Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification) at SiFive. Own verification planning and execution for Vector, ALU, floating-point blocks from testplanning to unit level verification and integration to core level.
What you'll do
- Own verification planning and execution for Vector, ALU, floating-point blocks from testplanning to unit level verification and integration to core level
- Drive verification strategy, test planning, Testbench development, tests writing, debug, coverage analysis, and closure for complex Vector, ALU
- Define effective verification approaches for arithmetic, floating-point, operand dependency, bypass/forwarding, replay, flush/recovery, exception
- Develop robust verification environments, assertions, checkers, scoreboards, stimulus, and coverage models that expose corner cases and improve bug-finding efficiency
- Partner closely with architecture, design, and verification teams to review specifications, identify risk early, and improve verification completeness
What you need
- Python
- C++
- UVM
- Verilog
- C