ASIC Digital Design, Principal Engineer

About the role

ASIC Digital Design, Principal Engineer at Synopsys (incl. Ansys). Own PCIe digital architecture and RTL for major controller subsystems, from micro-architecture through design convergence and post-silicon support.

What you'll do

• Own PCIe digital architecture and RTL for major controller subsystems, from micro-architecture through design convergence and post-silicon support
• Define micro-architecture, design specifications, and implementation approach for high-performance, low-power, scalable, configurable PCIe IP
• Make and document key design decisions; act as the go-to authority for protocol, data-path, clocking/reset, and RAS issues
• Work with verification, formal, emulation, physical design, firmware, and system teams to get IP integrated and silicon-successful
• Influence PCIe IP technical strategy, roadmap, and next-generation architecture, including CXL and automotive variants

What you need

• VLSI

Good to have

• Python
• Perl