ASIC Digital Design, Sr Staff Engineer - 18563
HyderabadFull-time7–13 yrsPosted 2 months ago
Senior electrical and electronics role at Synopsys (incl. Ansys) in Hyderabad. Needs 7+ years and a B.Tech, B.E. or M.Tech.
About the role
ASIC Digital Design, Sr Staff Engineer - 18563 at Synopsys (incl. Ansys). Own end-to-end verification of UCIe, PCIe, or DDR IP blocks, from test planning and environment bring-up through coverage closure and sign-off.
What you'll do
- Own end-to-end verification of UCIe, PCIe, or DDR IP blocks, from test planning and environment bring-up through coverage closure and sign-off
- Build and extend UVM testbenches in SystemVerilog, including agents, sequencers, scoreboards, coverage models, and protocol checkers
- Write directed and constrained-random tests that stress protocol compliance, corner cases, and multi-layer interactions
- Translate protocol specifications into executable test plans, assertions (SVA), and functional coverage models that map to real silicon risk
- Collaborate with design, architecture, and silicon validation teams on bug triage, ECO impact analysis, and bring-up readiness
What you need
- UVM
- Verilog
- VLSI
- Test cases