ASIC Physical Design, Sr Engineer - 18156
HyderabadFull-time5–9 yrsPosted 4 months ago
Senior electrical and electronics role at Synopsys (incl. Ansys) in Hyderabad. Needs 5+ years and a B.Tech, B.E. or M.Tech.
About the role
ASIC Physical Design, Sr Engineer - 18156 at Synopsys (incl. Ansys). Own the full RTL-to-GDSII physical implementation flow for memory test-chip blocks and top-level designs, driving synthesis, floorplanning, power planning, placement.
What you'll do
- Own the full RTL-to-GDSII physical implementation flow for memory test-chip blocks and top-level designs, driving synthesis, floorplanning, power planning, placement
- Develop and maintain Back-End implementation and sign-off flows including PnR, STA, PV, IR/EM analysis, and extraction methodologies
- Review and implement foundry sign-off requirements and tape-out checklists, ensuring manufacturing compliance and first-pass silicon success
- Execute timing analysis and closure across multiple PVT corners, optimizing for power, performance, and area
- Collaborate with Foundry, CAD, Front-End, DFT, STA, and Design teams to resolve implementation challenges and hit project milestones
What you need
- VLSI
- Python
- Perl