Principal Digital Methodology Engineer - Design for Testability (DFT)
BengaluruFull-time15–27 yrsPosted 1 week ago
Leadership electrical and electronics role at Synopsys (incl. Ansys) in Bengaluru. Needs 15+ years and an M.Tech, B.Tech or B.E..
About the role
Principal Digital Methodology Engineer - Design for Testability (DFT) at Synopsys (incl. Ansys). Define and drive DFT methodologies for next-generation ASIC and SoC designs across strategic customer programs.
What you'll do
- Define and drive DFT methodologies for next-generation ASIC and SoC designs across strategic customer programs
- Lead deployment of advanced test solutions including scan compression, hierarchical DFT, IEEE 1500 wrappers, IJTAG instrumentation networks
- Architect scalable test access infrastructures using IEEE 1149.1, IEEE 1149.6, IEEE 1687, and IEEE 1500 standards for complex multi-die and chiplet-based systems
- Develop automation frameworks, signoff criteria, and reusable methodology packages using Tcl, Python, and Perl that accelerate adoption across business units
- Collaborate directly with R&D teams to influence TestMAX product roadmap based on real deployment challenges and customer requirements
What you need
- Python
- VLSI
- Perl
- Shell scripting
- IPR
- Customer success
Good to have
- Instrumentation
- Roadmapping