Senior Layout Design Engineer
NoidaFull-time3–6 yrsPosted 2 weeks ago
Mid-level electrical and electronics role at Synopsys (incl. Ansys) in Noida. Needs 3+ years and a B.Tech, B.E. or M.Tech.
About the role
Senior Layout Design Engineer at Synopsys (incl. Ansys). Design and own full custom analog layouts for GPIO, specialty IO, and general-purpose analog IP blocks including I2C, I3C, SMBUS, eMMC, SVID, Quad SPI.
What you'll do
- Design and own full custom analog layouts for GPIO, specialty IO, and general-purpose analog IP blocks including I2C, I3C, SMBUS, eMMC, SVID, Quad SPI
- Develop high-performance LVDS layouts and crystal oscillator circuits with attention to signal integrity, noise coupling, and parasitic management
- Collaborate with circuit designers to translate schematics into physical implementations that meet area, performance, matching, and reliability specifications
- Perform layout verification including DRC, LVS, and parasitic extraction analysis, iterating with design teams to close on performance targets
- Build and maintain layout automation scripts to improve design efficiency, consistency, and quality across IP families
What you need
- VLSI
- Python
- Perl