IC Verification Engineer

About the role

Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features. Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure

What you'll do

• Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies
• Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features
• Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure
• Work with other members of the team, guide/mentor junior team members
• Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture

What you need

• 12–22 years in electrical & electronics
• UVM
• Verilog
• Test cases
• B.Tech or B.E.