IP Manager, Design and Verification - Networking

About the role

We are looking for an IP Manager to join NVIDIA’s Networking front-end design team! In this role, you will lead and manage a cluster of IP teams responsible for both design and design verification (DV) of complex hardware IP blocks across NVIDIA’s next-generation SmartNIC and DPU products.

What you'll do

• Lead, mentor, and grow a team of design and verification engineers across a cluster of IP blocks. You will define team structure, hiring plans
• Own the end-to-end execution of IP delivery — micro-architecture, RTL design, functional verification, coverage closure, assertions, formal verification
• Set quality bars, review schedules, and drive milestone adherence across your IP cluster
• Define and drive verification strategies, test plans, coverage goals, and sign-off criteria for your IPs
• Your team will develop UVM-based constrained-random and directed test environments, achieve functional and code coverage targets

What you need

• 10–18 years in electrical & electronics
• Networking
• Verilog
• VLSI
• UVM
• Test cases
• B.Sc or M.Sc

Good to have

• FPGA
• Python
• CI/CD
• Shell scripting
• Prototyping
• Perl

What you get