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Lead Design Engineer

Cadence·Bengaluru

Pay not stated6–10 yrsFull-time

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About the role

IP Integration and release Engineer for SSG IP Release engineering team. Position is based in Bangalore . The role would include IP integration, verification, and release of the IP solution of Cadence to different customers.

What you need

  • 6–10 years in electrical & electronics
  • Verilog
  • VLSI
  • UVM
  • B.Tech or B.E. or M.Tech

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Early: posted 1 h ago on their own site