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Principal Design Engineer

Cadence·Pune

Pay not stated7–13 yrsFull-time

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About the role

BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. Design Verification experience verifying complex designs and leading projects from concept to verification closure. Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage.

What you'll do

  • Design Verification experience verifying complex designs and leading projects from concept to verification closure

What you need

  • 7–13 years in electrical & electronics
  • UVM
  • VLSI
  • Verilog
  • Test cases
  • B.Tech or B.E. or M.Tech

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