Principal DFT Engineer

About the role

The Principal Digital DFT Engineer is responsible for architecting, implementing, and verifying advanced DFT solutions for complex digital ASICs and SoCs. This position emphasizes direct technical execution, deep problem-solving, and ownership of DFT flows for robust testability and manufacturing yield.

What you'll do

• Own and drive all aspects of DFT architecture, definition, and implementation for digital chips, including scan insertion, ATPG, boundary scan, MBIST, logic BIST
• Hands-on execution with EDA tools for scan synthesis, test pattern generation, fault simulation, and DFT rule checks
• Create and validate test plans targeting high coverage for stuck-at, transition, and critical path faults
• Integrate DFT with RTL and physical design teams; resolve complex trade-offs impacting fault coverage, PPA, or manufacturability
• Optimize test modes, design for manufacturability, and debug silicon failures from bring-up through production ramp

What you need

• 10–18 years in electrical & electronics
• VLSI
• Python
• Verilog
• Perl
• Test cases
• B.Tech or B.E.