R&D Engineering, Sr Engineer

About the role

R&D Engineering, Sr Engineer at Synopsys (incl. Ansys). Characterize and model standard cell libraries for advanced technology nodes, generating Liberty files including NLDM, NLPM, CCS timing, CCS noise, ECSM, LVF, AOCV.

What you'll do

• Characterize and model standard cell libraries for advanced technology nodes, generating Liberty files including NLDM, NLPM, CCS timing, CCS noise, ECSM, LVF, AOCV
• Handle characterization across a wide range of cell types: combinational, sequential, clock gating, synchronizers, retention, level shifters, power gating, always-on
• Debug and resolve correlation issues between characterization results, static timing analysis, and SPICE simulations, working across tool flows to identify root causes
• Execute QA checks, regression analysis, and release validation to ensure library deliverables meet quality and accuracy standards before they ship
• Drive methodology improvements and automation initiatives that make characterization flows faster, more reliable, and easier to maintain across multiple projects

What you need

• 2–5 years in electrical & electronics
• VLSI
• Python
• Perl
• Regression testing
• B.Tech or B.E.