R&D Engineering, Sr Engineer

Synopsys (incl. Ansys)·Noida

Pay not stated1–3 yrsFull-time

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About the role

R&D Engineering, Sr Engineer at Synopsys (incl. Ansys). Design and simulate embedded memory circuits including SRAM, ROM, and Register Files using Cadence Virtuoso and related tools.

What you'll do

Design and simulate embedded memory circuits including SRAM, ROM, and Register Files using Cadence Virtuoso and related tools
Support layout activities by working with layout engineers to ensure design intent translates cleanly into physical implementation
Run bitcell characterization and basic reliability analysis to validate performance across process, voltage, and temperature corners
Debug circuit-level issues by analyzing simulation results, identifying root causes, and proposing fixes with guidance from senior engineers
Collaborate with CAD, verification, and frontend teams to align on design requirements, timing constraints, and integration needs