- Can I apply
- Needs PhD · 8–14 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
Read from the company's own careers page; you apply on their site.
How well do you fit this job?
Upload your resume to see each requirement checked against your profile, in under a minute.
As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. Perform substrate breakout patterns for ASIC packages. Optimize package pinout incorporating system level trade-offs of pins assignment. Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite.
Texas Instruments·Bengaluru
Qualcomm·Bengaluru