Senior Physical Verification Engineer

About the role

This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you'll do

• In this position, you'll own physical verification for the full chip — taking designs from block-level assembly through full-chip integration and tapeout on the latest…
• Own full-chip physical verification signoff — DRC, LVS, antenna — across block, partition, and top levels, and drive convergence to a clean tapeout database
• Push the frontier of 3D die stacking and heterogeneous integration — verifying die-to-die interfaces and stitching together dies built on entirely different process…
• Be at the leading edge of Angstrom class technology, enabling signoff for breakthroughs like Super Power Rail backside power delivery and nanosheet GAA transistors
• Reinvent how signoff is done with AI — building ML- and LLM-powered automation for root-cause analysis, and flow optimization

What you need

• 5–9 years in electrical & electronics
• Inventory counting
• VLSI
• Machine learning
• LLMs
• Root cause analysis
• B.Tech or B.E. or M.Tech