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Sr Engineer, Design Verification

Renesas·Bengaluru

Pay not stated4–8 yrsFull-time

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About the role

We are looking for a candidate with a strong background in verifying complex integrated circuits. The candidate needs to have skills that are up to date with the latest IC verification tools and flow. The candidate will work closely with design, and verification engineering. In addition, strong collaboration and communication skills are a must.

What you'll do

  • Develop verification testbench components for chip/module level using System Verilog
  • Use high-level concepts (Object-oriented, UVM, etc) to develop an extendable environment
  • Define and execute detailed verification plan from spec working with architects and designer engineers
  • Debug tests, regression failures and participate in silicon debugging and analysis

What you need

  • 4–8 years in electrical & electronics
  • UVM
  • Verilog
  • B.Tech or B.E.

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Source
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On Applied Materials' site (Workday): account needed, ~10–15 min
Early: posted 1 h ago on their own site