Staff Design Verification Engineer

About the role

Key member of design verification team for SOC or subsystem design pre silicon verification. The candidate will be responsible for formulating verification strategies, Define verification architecture, Flow, Methodology and leading, driving and completing verification of large integrated products. As a senior team member, it is expected that he/she will lead and influence verification methodologies within both DBU and ADI.

What you'll do

• Lead pre-silicon verification for complex SoC or subsystem designs, driving execution from planning to closure
• Verify microprocessor-based systems, AI/ML accelerators, and high-speed peripherals using advanced methodologies
• Architect and implement UVM-based testbenches, DV flows, and scalable verification methodologies
• Define and execute test plans; drive functional and code coverage closure in collaboration with design teams
• Work cross-functionally with emulation, FPGA, and firmware teams to ensure end-to-end system correctness

What you need

• 8–14 years in electrical & electronics
• Verilog
• UVM
• C++
• C
• Python
• Machine learning
• B.Tech or B.E. or M.Tech

Good to have

• FPGA
• Test cases