Staff Engineer – DFT Engineering

About the role

We are seeking a skilled and experienced DFT Engineer to join our VLSI design team. The ideal candidate should have a strong background in Design for Testability (DFT) techniques, including LBIST (Logic Built-In Self-Test), ATPG (Automatic Test Pattern Generation), DFT DRC (Design Rule Checking), MBIST (Memory Built-in Sefl-Test), Boundary Scan, JTAG and Analog/Phy DFT.

What you'll do

• Collaborate with the Design/Arch/PTE/PD team to ensure efficient and effective testability of complex integrated circuits
• Design and implement DFT features such as scan chains, compression, and built-in self-test structures to enhance testability
• Conduct DFT DRC checks in RTL/Netlist database to ensure compliance with DFT guidelines and rules
• Utilize Siemen’s DFT tool to perform DFT analysis and optimize testability metrics
• Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models using on-chip test compression techniques

What you need

• 7–10 years in electrical & electronics
• VLSI
• Python
• Perl
• B.Tech or B.E.