Staff Engineer, Memory Layout Design

About the role

Staff Engineer, Memory Layout Design at Synopsys (incl. Ansys). Lead technology studies and process entitlement evaluations for advanced nodes (FinFET.

What you'll do

• Lead technology studies and process entitlement evaluations for advanced nodes (FinFET
• Architect and build layout automation frameworks using Python and TCL that generate, verify, and validate custom memory IP layouts at scale
• Author and document physical implementation design rules, best practices, and layout methodologies that become the standard for how SRAM, ROM
• Evaluate next-generation EDA tools and capabilities, working directly with vendors and internal teams to define what gets adopted, how it gets integrated
• Provide technical leadership and mentorship to layout development teams, troubleshooting complex verification failures, flow bottlenecks

What you need

• 8–14 years in electrical & electronics
• Python
• VLSI
• ANSYS
• Machine learning
• Troubleshooting
• PhD