- Can I apply
- Needs PhD · 8–14 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site (Workday): account needed, ~10–15 min
Early: posted 1 h ago on their own site
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About the role
This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and efuses for consumer, industrial and automotive applications.
What you'll do
- STA Lead with expertise in timing constraints handling for different fullchip IO protocol (I2C, DDR, USB etc…)
- Generating ECO for timing closure for complex multi power domain designs
- Power recovery with STA signoffDebug constraint issues in P&R environment
- LEC/Low power checks experience
What you need
- 6–11 years in electrical & electronics
- Verilog
- Python
- Perl
- B.Tech or B.E. or M.Tech
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- Can I apply
- Needs PhD · 8–14 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site (Workday): account needed, ~10–15 min
Early: posted 1 h ago on their own site
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- Can I apply
- Open to any education · 5–8 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Applied Materials' site (Workday): account needed, ~10–15 min
Early: posted 1 h ago on their own site
- Can I apply
- Needs PhD · 8–14 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site