Staff System Validation Engineer

About the role

This role, based in Bangalore, involves defining requirements, developing emulation platforms based on the SoC RTL and validating product functionality through hands‑on hardware, software, and system‑level testing.

What you'll do

• Port SoC RTL to FPGA, including placement, timing closure, and emulation bring‑up
• Develop Verilog models to emulate analog functions on FPGA
• Perform FPGA verification, system integration, and lab testing
• Support ongoing FPGA and board‑level validation activities
• Use Python and C/C++ for simulation and data analysis

What you need

• 8–14 years in electrical & electronics
• Python
• LabVIEW
• Instrumentation
• FPGA
• C++
• Verilog
• B.Sc or M.Sc or PhD or B.Tech or B.E.

Good to have

• C
• Lab testing
• Root cause analysis
• Design systems