- Can I apply
- Open to any education · 5–9 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Weave's site (Ashby): short form, ~5 min
Early: posted 1 h ago on their own site
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About the role
We are seeking highly motivated Senior Memory Architect who can architect, design, develop, and optimize memory IPs (SRAM, ROM, Register files, etc.) for advanced semiconductor nodes.
What you'll do
- Architect memory compiler and custom memory instance design
- Analyze memory specs and meet PPA requirement for given compiler design
- Perform transistor-level design and simulations (HSPICE, Spectre)
- Conduct corner analysis, Monte Carlo simulations and variation aware design
- Debug design issues across PVT conditions
What you need
- 6–10 years in software engineering
- Verilog
- Any graduate
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