- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
Read from the company's own careers page; you apply on their site.
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About the role
This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office.
What you'll do
- Define and architect high-performance blocks for the latest, most advanced networking ASICs
- Perform micro-architecture and RTL logic design to maximize throughput while minimizing power consumption
- Collaborate with the verification team to develop test plans and debug test failures
- Work closely with the physical design team to develop timing constraints, analyze timing violations, and implement timing fixes
- What You Need to Bring
What you need
- 5–9 yrs of experience
- VLSI
- Verilog
- Test cases
- B.Tech or B.E. or M.Tech
Similar jobs
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 1 h ago on their own site
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 2 h ago on their own site
- Can I apply
- Needs PhD or B.Tech or B.E. · 7–13 yrs
- Pay
- Pay not stated
- Source
- From the company's careers page · today
- How to apply
- On Cisco's site: account needed, ~10–15 min
Early: posted 2 h ago on their own site