ASIC DFT Engineer || MBIST, SCAN, ATPG, JTAG || Exp 4 to 8 years

About the role

Bangalore, India; Chennai, India; Hyderabad, Telangāna, India The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.

What you'll do

• Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs
• Responsible for development of innovative DFT IP in collaboration with the multi-functional teams
• Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post…
• Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die

What you need

• 4–8 yrs of experience
• Python
• Perl
• Verilog
• VLSI
• Routing and switching
• B.Tech or B.E.