ASIC DFT Engineering Technical Leader | ATPG, SCAN, MBIST, JTAG | 12+ years, Bangalore

About the role

Bangalore, India; Hyderabad, Telangāna, India The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.

What you'll do

• Be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test
• Work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle
• As a member of this team you will also be involved in crafting groundbreaking next generation networking chips
• Help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design…
• Manages the definition, architecture and design of high performance ASICs

What you need

• 12–22 yrs of experience
• Python
• Perl
• VLSI
• Routing and switching
• B.Tech or B.E.

Good to have

• Verilog