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ASIC Digital Design, Sr Staff Engineer

Synopsys (incl. Ansys)·Hyderabad

Pay not stated12–22 yrsFull-time

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About the role

ASIC Digital Design, Sr Staff Engineer at Synopsys (incl. Ansys). Architecting and implementing high-performance RTL designs for advanced IP cores.

What you'll do

  • Architecting and implementing high-performance RTL designs for advanced IP cores
  • Creating comprehensive architecture and micro-architecture documents, translating functional specifications into detailed design solutions for complex components
  • Leading and executing design tasks including RTL coding, synthesis, CDC analysis, debugging, and test development, ensuring robust and reliable ASIC designs
  • Collaborating closely with the verification team to plan, execute, and close verification cycles, achieving high coverage and design quality
  • Interacting with customers to clarify specification requirements and ensure design alignment with end-user needs

What you need

  • 12–22 yrs of experience
  • Verilog
  • VLSI
  • Customer success
  • Perl
  • Any graduate

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