ASIC Physical Design, Manager

About the role

ASIC Physical Design, Manager at Synopsys (incl. Ansys). Lead a team of physical design engineers responsible for building and maintaining the complete PD flow and methodology for the Testchip team.

What you'll do

• Lead a team of physical design engineers responsible for building and maintaining the complete PD flow and methodology for the Testchip team
• Drive end-to-end execution of multiple testchip projects, managing timing closure, power optimization, and physical verification using tools like ICC2, Fusion Compiler
• Set up and continuously improve design automation flows across physical design stages, including scripting for repeatability, quality checks, and faster closure cycles
• Collaborate with front-end design, silicon validation, and software teams to align on design intent, verify handoffs, and troubleshoot issues that span multiple domains
• Manage project schedules, resource allocation, and risk mitigation to hit tape out dates while maintaining quality and design robustness

What you need

• 8–14 yrs of experience
• VLSI
• Any graduate