ASIC Physical Design, Senior Staff Engineer

About the role

ASIC Physical Design, Senior Staff Engineer at Synopsys (incl. Ansys). Own physical design implementation of UCIe PHY blocks and testchips from floorplanning through tapeout on 5nm and more advanced nodes.

What you'll do

• Own physical design implementation of UCIe PHY blocks and testchips from floorplanning through tapeout on 5nm and more advanced nodes
• Drive synthesis, place and route, timing closure, and physical verification using DC, PT, ICC2/FC, and ICV across multiple concurrent projects
• Work directly with verification, DFT, and IP integration teams to resolve design issues, close timing, and meet PPA targets without slipping the schedule
• Lead design reviews, present tradeoff analyses, and make real-time decisions on floorplan changes, clock tree strategies, and signoff waivers
• Pilot new physical design flows and advanced node methodologies, then document what worked and what did not for the rest of the team

What you need

• 5–15 yrs of experience
• VLSI
• Travel booking
• Roadmapping
• Any graduate