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Associate III - VLSI PD SVP

UST·Bengaluru

Pay not stated3–5 yrsFull-time
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About the role

The ideal candidate will have strong expertise in ASIC/SoC physical design flows, including synthesis, floorplanning, placement,PNR, clock tree synthesis, routing, timing closure, and sign-off. This role requires hands-on experience with industry-standard EDA tools and a deep understanding of advanced technology nodes.

What you'll do

  • Drive power, performance, and area (PPA) optimization
  • Conduct physical verification (DRC/LVS) and sign-off checks.Work on multi-voltage, low-power design techniques and UPF/CPF flows
  • Support ECO implementation and tape-out activities

What you need

  • 3–5 yrs of experience
  • VLSI
  • B.Tech or B.E.

Good to have

  • Python
  • Perl

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