Design Methodology – Principal DRAM Power Integrity Engineer

About the role

Design Methodology – Principal DRAM Power Integrity Engineer at Micron Technology. Develop and standardize EMIR methodology that applies consistently across all DRAM products, ensuring alignment, repeatability, and high-quality analysis outcomes.

What you'll do

• Develop and standardize EMIR methodology that applies consistently across all DRAM products, ensuring alignment, repeatability, and high-quality analysis outcomes
• Perform static and dynamic EM/IR and PDN analysis using RedHawk or Totem or other industry‑standard tools; identify root‑cause issues such as high‑resistance segments
• Actively leverage AI‑based tools, agentic workflows, and automation frameworks for effective Power-delivery-network (PDN) analysis
• Maintain a strong understanding of the full EMIR flow—from netlist preparation, extraction, simulation
• Partner across design, timing, physical implementation, architecture, modeling, and verification teams to understand real switching behavior, develop worst‑case vectors

What you need

• 8–14 yrs of experience
• ANSYS
• Root cause analysis
• B.Tech or B.E.

Good to have

• Circuit design
• Python
• Machine learning