Design Verification Architect (Sr staff or above)

About the role

We are looking to hire a strong technical leader to architect and overhaul the testbench environment for state-of-the-art interconnect IPs.

What you'll do

• Drive testbench architecture and development to verify complex interconnect and subsystem designs while working with the wider engineering team
• Ensure a scalable, reusable DV environment is built and deployable across different tiers of products
• Work with all stakeholders to ensure program success

What you need

• 12–22 yrs of experience
• B.Sc or B.Tech or B.E. or BCA or M.Sc or M.Tech or MCA

Good to have

• UVM
• Verilog
• Test cases