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Design Verification Engineer (India)

Fortaegis Technologies·Bengaluru

Pay not stated5–9 yrsFull-time

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About the role

We are looking for a Design Verification Engineer responsible for verifying RTL designs for FPGA and ASIC-based products. The role focuses on ensuring that system-level and block-level requirements are correctly implemented in hardware designs and identifying functional issues early.

What you'll do

  • Develop and execute verification strategies for intricate FPGA and ASIC RTL designs
  • Design, implement, and maintain verification environments, including automated test suites and infrastructure, following industry-standard methodologies
  • Identify, debug, and document design issues, collaborating closely with design engineers to validate functionality and performance
  • Implement coverage-focused verification approaches to achieve thorough verification of all design features
  • Coordinate with design, architecture, and software teams to ensure smooth integration and verification of designs

What you need

  • 5–9 yrs of experience
  • FPGA
  • UVM
  • Verilog
  • Any graduate

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