Design Verification Engineer- Senior / Principal

About the role

We are looking for design verification engineer to work in the dynamic Microsoft Artificial Intelligence S ilicon Engineering ( AIS iE ) team. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

What you'll do

• The AISiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered…
• Own or lead verification of complex flows at the SOC, subsystem, or IP levels
• Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios
• Learn about the design and interact with partner teams to define verification strategies and test plans
• Develop verification environments and run and debug simulations to drive quality

What you need

• 8–16 yrs of experience
• UVM
• C++
• Verilog
• Python
• Test cases
• Perl
• Any graduate