DFT Architect

About the role

The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Expert in scan, ATPG, MBIST, at-speed test and hierarchical DFT methodologies. Scripting in Tcl, Python or Perl.

What you'll do

• Define DFT architecture and test strategy for complex SoCs, and own scan, MBIST, ATPG and pattern delivery from design through silicon bring-up
• Define DFT architecture and test strategy: scan, compression, MBIST/LBIST, JTAG/IJTAG, boundary scan
• Plan and implement hierarchical DFT for full-chip and block-level designs
• Own ATPG, fault-coverage targets, and pattern verification (zero-delay and SDF)
• Resolve DFT DRC and timing issues with RTL and PD teams

What you need

• 8–10 yrs of experience
• VLSI
• Verilog
• Python
• Perl
• Any graduate