Digital Verification Engineers - 7 openings

About the role

Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.

What you'll do

• Develop design verification methodologies and implement standard debug flows
• Work with designers in verification and validation of circuit designs
• Participate in design reviews
• Prepare design verification plan based on design specifications
• Plan and schedule assigned projects for timely completion

What you need

• 5–9 yrs of experience
• UVM
• B.Tech or B.E.

Good to have

• FPGA