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Director of Digital Design Engineering, Memory Interface IP

Synopsys (incl. Ansys)·Hyderabad

Pay not stated15–20 yrsFull-time

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About the role

Director of Digital Design Engineering, Memory Interface IP at Synopsys (incl. Ansys). Lead a team of ASIC digital design and verification engineers working on HBM, DDR, and LPDDR memory interface IP.

What you'll do

  • Lead a team of ASIC digital design and verification engineers working on HBM, DDR, and LPDDR memory interface IP
  • Own the technical direction and execution of RTL design and verification at both block and chip integration levels
  • Drive design reviews, architecture decisions, and quality checkpoints across the full development cycle from spec to silicon
  • Collaborate with cross-functional teams including analog design, DFT, physical design, and product management to align on specifications, schedules, and deliverables
  • Build and refine design and verification methodologies, incorporating AI-driven tools and automation to improve efficiency and quality

What you need

  • 15–20 yrs of experience
  • VLSI
  • Verilog
  • Circuit design
  • Product strategy
  • Any graduate

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