Engineer II, Physical Design

About the role

As a Senior Physical Design Engineer , you will be responsible for executing and optimizing the RTL-to-GDS implementation flow for our high-performance CPU cores. In this role, you will take ownership of block-level implementation and contribute to advanced design recipes to drive PPA (Power, Performance, Area) closure on leading-edge N3/N2 process nodes.

What you'll do

• Technical Execution & Troubleshooting: Identify, debug, and resolve flow and tool-related issues at the block level
• Cross-Functional Collaboration: Partner with IP teams (SRAM/Std Cell) and technical leads to analyze and model PPA impacts within your design blocks

What you need

• 2–5 yrs of experience
• VLSI
• Python
• Data analysis
• Troubleshooting
• Travel booking
• Machine learning
• Any graduate