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Engineer-std cell layout

Micron·Hyderabad

Pay not statedJunior levelFull-time
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About the role

Design and maintain standard cells layout for new DRAM products on new technology Lead the stdcells layout projects from initial spec definition to till PPA qualified library release

What you'll do

  • Design and maintain standard cells layout for new DRAM products on new technology

What you need

  • 1–3 years in electrical & electronics
  • Any graduate

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