Senior RTL Design Engineer – FPGA/ASIC Design

About the role

THE ROLE AMD is seeking a highly motivated and technically strong Senior Silicon Design Engineer to join our team working on next-generation adaptive computing and silicon technologies. The successful candidate will contribute to the design, development, integration, and validation of complex FPGA and Adaptive SoC solutions.

What you'll do

• Develop and optimize RTL designs using VHDL/Verilog/SystemVerilog, with emphasis on functional correctness, performance, and resource utilization
• Contribute to FPGA implementation activities, including synthesis, PnR, STA, and timing closure
• Develop and optimize DSP algorithms and hardware acceleration solutions using programmable logic
• Participate in hardware-software co-design, embedded system integration, and performance optimization
• Develop and maintain simulation, co-simulation, emulation, and FPGA-based prototyping environments for design and system validation

What you need

• FPGA
• VLSI
• Verilog
• Python
• MATLAB
• UVM
• B.Tech or B.E. or M.Tech or M.Sc

Good to have

• Prototyping
• Root cause analysis
• Bash
• Perl
• Linux