GPU STA/Timing Engineer (Senior Lead/Staff)

About the role

The role involves close collaboration with Architecture, RTL, Physical Design, DFT, and SoC teams to deliver best-in-class silicon products.

What you'll do

• Own block-level and full-chip STA signoff for GPU designs
• Develop and validate timing constraints (SDC)
• Perform MCMM/MMMC timing analysis, timing closure, and ECO implementation
• Drive setup/hold, noise, SI, and low-power timing closure
• Collaborate with cross-functional teams to resolve timing issues

What you need

• 6–10 yrs of experience
• VLSI
• Python
• B.Sc or M.Sc or B.Tech or B.E. or BCA or M.Tech or MCA

Good to have

• Machine learning