Hardware Verification Engineer

About the role

We are seeking a seasoned Design Verification Engineer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions

What you'll do

• Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems
• Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards
• Collaborate with software teams to define and implement configurable test benches
• Work with design teams test plans, failure debug, coverage, etc

What you need

• 8–14 yrs of experience
• Hardware
• Verilog
• UVM
• Test cases
• IoT
• IPR
• M.Sc or B.Tech or B.E.

Good to have

• Python