High Speed IO Validation Engineer

About the role

The NVIDIA Silicon Co-Design Group is seeking a versatile engineer to join our High Speed SERDES IO electrical validation team. Your bench is where silicon meets the signal — where every link train, jitter sweep, eye diagram, and protocol corner gets exercised before the part ships.

What you'll do

• Engage with cross-functional engineering teams to facilitate the design and development process
• Analyze complex HSIO bugs by applying strong debugging techniques and collaborating with various teams for rapid resolution
• Diagnose issues and validate high-speed interfaces using modern lab equipment, including DSOs and BERT, with expert-level proficiency
• Develop and apply test/debug programs using scripting languages (such as Perl and Python) to perform stress and failure analysis on high-speed interfaces
• Innovate methodologies that leverage AI-assisted workflows and data-driven analytics to enhance debugging efficiency and improve validation quality

What you need

• 3–6 yrs of experience
• Circuit design
• Python
• Perl
• Root cause analysis
• M.Sc or B.Tech or B.E.