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IC Design Engineer

LSI·Bengaluru

Pay not statedJunior levelFull-time

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About the role

Block Level and Full chip level Static(IR)/Dynamic(IVD) sign-off Power Estimation on blocks and full chip (both vector and vectorless) Signal/Power EM sign-off at Block level and Full chip Custom power grid implementation for block/hardmacs System level Analysis (PDN) with board, package, interposer and die

What you'll do

  • Work with SoC and packaging team in bump assignment, pkg routing optimization

What you need

  • 1–3 years in mechanical & production
  • Any graduate

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